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Download the Call for Papers to learn more about EPTC 2011.
The organizing committee warmly welcomes you to the 12th Electronics Packaging Technology Conference (EPTC 2010) which will be held on 8-10th December 2010 at the Shangri-La Hotel, Singapore. This premier international conference is organized by the Reliability/CPMT/ED Singapore Chapter of the IEEE Singapore Section. EPTC 2010 is jointly sponsored by IEEE CPMT Society and Singapore Exhibition and Convention Bureau. The 12th EPTC is a 3-day event, it features keynote talks, technical sessions, professional development courses, exhibition, social and networking activities.
The EPTC technical committee has reviewed a total of 223 abstracts from 23 countries submitted for the conference. This year’s conference will have 35 technical sessions covering a wide spectrum of topics, including advanced packaging, materials, processes, interconnect technologies, quality & reliability, modeling & simulation, printed electronics, emerging technologies and Wafer/Package testing. The 12th EPTC also features professional development courses covering 5 topics offered by world-class experts in their fields. This year, 5 invited talks will be given during the technical sessions by experts from various fields of packaging technologies. Besides, three special sessions have been organized on Embedded Wafer Level Packaging, Printed Electronics and Wafer/Package testing & characterization.
Keynote Talks:
| Next Generation Packages for Mobile Products: Dawn of a New Age or Same Old Story? |
| by Mr. Tom Gregorich, MediaTek, USA |
| Digital µ-Fabrication Methods based on Printing Technologies |
| by Prof. Reinhard R. Baumann, Fraunhofer Institute, Germany |
Professional Development Courses:
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Package and Board Level Reliability Part 1-Accelerated Testing and Design for Reliability Part 2-Finite Element Simulations for Failure Prediction |
| by Ahmer SYED, Amkor |
| Flip Chip Fabrication and Interconnection |
| by Eric PERFECTO, IBM |
| Electrical Test Strategies for High-Density Package |
| by Bruce C. KIM, The University of Alabama |
| 3D IC/Si Integrations and WLP |
| by John H. LAU, ITRI |
| Advanced Failure Analysis of Semiconductor Packaging |
| by Siegfried GOERLICH and Ming XUE, Infineon |
Invited Papers:
| Thermal Challenges and Opportunities in Concentrated Photo-Voltaics |
| by Seri LEE, Nanyang Technological University, Singapore |
| Evolution and Outlook of TSV and 3D IC/Si Integration |
| by John LAU, ITRI, Taiwan |
| VCCT and Integral Concepts of Bi-material Interface Fracture in low-K Structures - Going to Understand Relations |
| by Jürgen AUERSPERG, Fraunhofer Institute, Germany |
| On the Intermetallic Corrosion of Cu-Al Wire bonds |
| by Tim BOETTCHER, NXP Semiconductors |
| Factors Affecting Electromigration and Current Carrying Capacity of FC and 3D IC Interconnects |
| by Ahmer SYED, Amkor Technology, United States |
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